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INF3500 - Hiver 2024 |
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LUNDI |
MARDI |
MERCREDI |
JEUDI |
VENDREDI |
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| JANVIER |
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2 |
3 |
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5 |
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| 8 |
9 |
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11 |
12 |
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Theme #0
Rappels |
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B1 |
B1 |
B1 |
B1 |
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Theme #1
Introduction |
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| B2 |
B2 |
B2 |
B2 |
B2 |
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| 22 |
23 |
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25 |
26 |
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Labo #1
Flot de conception de circuits numeriques |
Theme #2
Technologies de logique programmable |
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| B1 |
B1 |
B1 |
B1 |
B1 |
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| 29 |
30 |
31 |
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| B2 |
B2 |
B2 |
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LUNDI |
MARDI |
MERCREDI |
JEUDI |
VENDREDI |
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| FEVRIER |
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1 |
2 |
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Theme #3
Modelisation et verification de circuits combinatoires |
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B2 |
B2 |
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6 |
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Labo #2
Modules combinatoires, bancs d'essai et ressources du FPGA |
Theme #4
Modelisation et verification de circuits sequentiels |
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| B1 |
B1 |
B1 |
B1 |
B1 |
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13 |
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Theme #5
Conception de chemins des donnees |
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| B2 |
B2 |
B2 |
B2 |
B2 |
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| 19 |
20 |
21 |
22 |
23 |
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Labo #3
Circuits sequentiels |
Theme #6
Conception et implementation de fonctions arithmetiques sur FPGA |
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| B1 |
B1 |
B1 |
B1 |
B1 |
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29 |
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Controle #1 |
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| B2 |
B2 |
B2 |
B2 |
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LUNDI |
MARDI |
MERCREDI |
JEUDI |
VENDREDI |
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| MARS |
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1 |
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B2 |
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| Relache |
Relache |
Relache |
Relache |
Relache |
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| 11 |
12 |
13 |
14 |
15 |
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Labo #4
Conception de chemins des donnees |
Theme #7
Verification de systemes numeriques
Theme #8
Simulation, synthese et implementation |
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| B1 |
B1 |
B1 |
B1 |
B1 |
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| 18 |
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22 |
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Theme #9
Conception de processeurs a usage general |
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| B1 |
B2 |
B2 |
B2 |
B2 |
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| 25 |
26 |
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29 |
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Labo #5
Communications |
Theme #10
Performance: le temps |
Ferie |
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B1 |
B1 |
B1 |
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LUNDI |
MARDI |
MERCREDI |
JEUDI |
VENDREDI |
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| AVRIL |
Ferie |
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Theme #11
Performance: latence, debit et surface |
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B2 |
B2 |
B2 |
B1 |
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| AVRIL |
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Labo #6
Processeurs a usage general |
Controle
#2 (Formatif) |
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Theme #12
Revue generale |
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B2 |
B1 |
B1 |
B1 |
B2 |
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| AVRIL |
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Debut des Examens finaux |
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B1 |
B1 |
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